cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 1/ 8 MTE55N10FP cystek product specification n-channel enhancement mode power mosfet MTE55N10FP bv dss 100v i d 18a r ds(on) @v gs =10v, i d =18a 55.4 m (typ) r ds(on) @v gs =7v, i d =12a 56.1 m (typ) description the MTE55N10FP is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. the to-220fp package is universally preferred for all commercial-industrial applications features ? low on resistance ? simple drive requirement ? low gate charge ? fast switching characteristic ? insulating package, front/back side insulating voltage=2500v(ac) ? rohs compliant package ordering information device package shipping MTE55N10FP-0-ub-s to-220fp (rohs compliant package) 50 pcs/tube, 20 tubes/box, 4 boxes / carton environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ub : 50 pcs / tube, 20 tubes/box product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 2/ 8 MTE55N10FP cystek product specification symbol outline to-220fp MTE55N10FP g d s g gate d drain s source absolute maximum ratings (t c =25c) parameter symbol limits unit drain-source voltage (note 1) v ds 100 gate-source voltage v gs 30 v continuous drain current @t c =25 c, v gs =10v (note 1) 18* continuous drain current @t c =100 c, v gs =10v (note 1) i d 13* continuous drain current @t a =25 c, v gs =10v (note 2) 4.2 continuous drain current @t a =70 c, v gs =10v (note 2) i dsm 3.4 pulsed drain current @ v gs =10v (note 3) i dm 72* avalanche current (note 3) i ar 20 a single pulse avalanche energy @ l=0.1mh, i d =20 amps, v dd =50v (note 2) e as 20 repetitive avalanche energy (note 3) e ar 4.2 mj t c =25 c (note 1) 42 t c =100 c (note 1) p d 21 t a =25 c (note 2) 2.1 power dissipation t a =70 c (note 2) p dsm 1.4 w maximum temperature for soldering @ lead at 0.063 in(1.6mm) from case for 10 seconds t l 300 maximum temperature for soldering @ package body for 10 seconds t pkg 260 operating junction and storage temperature tj, tstg -55~+175 c *drain current limited by maximum junction temperature
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 3/ 8 MTE55N10FP cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 3.6 c/w thermal resistance, junction-to-ambient, max (note 2) r ja 58 c/w note : 1 . the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and is more useful in setting the upper di ssipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation pdsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user?s specific board design, and the maximum temperature of 175 c may be used if the pcb allows it. 3 . repetitive rating, pulse width limited by junction temperature t j(max) =175 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c. characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v v gs =0v, i d =250 a ? bv dss / ? tj - 0.1 - v/ c reference to 25 c, i d =250 a v gs(th) 2.0 - 4.0 v v ds = v gs , i d =250 a *g fs - 16 - s v ds =5v, i d =18a i gss - - 2 100 na v gs = 2 30v i dss - - 1 v ds =80v, v gs =0v i dss - - 10 a v ds =80v, v gs =0v, tj=125 c - 55.4 72 v gs =10v, i d =18a *r ds(on) - 56.1 80 m v gs =7v, i d =12a dynamic *qg - 11.2 - *qgs - 2.4 - *qgd - 4.8 - nc v dd =80v, i d =12a,v gs =10v *t d(on) - 8.4 - *tr - 15 - *t d(off) - 19.6 - *t f - 9 - ns v dd =50v, i d =12a, v gs =10v, r g =6 ciss - 453 - coss - 76.3 - crss - 33.7 - pf v gs =0v, v ds =30v, f=1mhz source-drain diode *i s - - 18 *i sm - - 72 a *v sd - 0.89 1.3 v i s =18a, v gs =0v *trr - 30 - ns *qrr - 45 - nc v gs =0v, i f =18a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 4/ 8 MTE55N10FP cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 024681 0 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v 10v,9v,8v,7v,6v v ds , drain-source voltage(v) i d , drain current (a) 5v 4. 5v v =4v gs static drain-source on-state resistance vs drain current 10 100 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =5v v gs =6v v gs =7v v gs =10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 100 200 300 400 500 600 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =18a r ds( on) @tj=25c : 55.4mtyp. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =18a
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 5/ 8 MTE55N10FP cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =5v gate charge characteristics 0 2 4 6 8 10 048121 qg, total gate charge(nc) v gs , gate-source voltage(v) 6 v ds =80v i d =12a maximum safe operating area 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) t c =25c, tj=175c v gs =10v, jc =3.6c/w single pulse dc 100ms r dson limited 10 s 100 s 1ms 10ms maximum drain current vs case temperature 0 2 4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175 200 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =3.6c/w
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 6/ 8 MTE55N10FP cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 024681012 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse power rating, junction to case 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) power (w) t j(max) =175c t c =25c jc =3.6c/w transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =3.6c/w
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 7/ 8 MTE55N10FP cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c959fp issued date : 2014.11.25 revised date : page no. : 8/ 8 MTE55N10FP cystek product specification to-220fp dimension *typical inches marking: millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.171 0.183 4.35 4.65 g 0.246 0.258 6.25 6.55 a1 0.051 ref 1.300 ref h 0.138 ref 3.50 ref a2 0.112 0.124 2.85 3.15 h1 0.055 ref 1.40 ref a3 0.102 0.110 2.60 2.80 h2 0.256 0.272 6.50 6.90 b 0.020 0.030 0.50 0.75 j 0.031 ref 0.80 ref b1 0.031 0.041 0.80 1.05 k 0.020 0.50 ref b2 0.047 ref 1.20 ref l 1.102 1.118 28.00 28.40 c 0.020 0.030 0.500 0.750 l1 0.043 0.051 1.10 1.30 d 0.396 0.404 10.06 10.26 l2 0.036 0.043 0.92 1.08 e 0.583 0.598 14.80 15.20 m 0.067 ref 1.70 ref e 0.100 * 2.54* n 0.012 ref 0.30 ref f 0.106 ref 2.70 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . style: pin 1.gate 2.drain 3.source 3-lead to-220fp plastic package cystek package code: fp date code device name e55 n 10
|
